DTA

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Tesi etd-09092025-094709

Tipo di tesi
Corso di Dottorato (D.M.226/2021)
Autore
LO VECCHIO, SARA
URN
etd-09092025-094709
Titolo
Towards Embedded Artificial Intelligence for Peripheral Neurorehabilitation
Settore scientifico disciplinare
ING-INF/06
Corso di studi
Istituto di Biorobotica - Ph.D. in Biorobotica
Relatori
relatore Prof. MICERA, SILVESTRO
Parole chiave
  • peripheral nerve recording
  • neural signal processing
  • implantable device prototyping
  • embedded artificial intelligence
Data inizio appello
25/02/2026;
Disponibilità
parziale
Riassunto analitico
Commercially available Peripheral Nerve Stimulation (PNS) devices, such as FDA-approved implants for treating overactive bladder syndrome, typically rely on continuous stimulation or external control, which often leads to overstimulation and reduced battery life. Recent developments have introduced transcutaneous PNS for essential tremor, relying on cloud-based Artificial Intelligence (AI) decoding rather than embedded intelligence. Meanwhile, closed-loop tibial nerve stimulation systems for bladder regulation using evoked Compound Nerve Action Potentials (CNAPs) as feedback have achieved superior control of micturition intervals compared to traditional methods, demonstrating the benefits of real-time neural feedback. This work focuses on the development of a portable device capable of delivering closed-loop peripheral neurostimulation with an integrated embedded AI algorithm based solely on neural recordings. This strategy could enhance long-term neural responsiveness while reducing negative consequences associated with continuous stimulation. Furthermore, implementing real-time analysis on-chip eliminates the need for external control or cloud-based data management for real-time signal analysis, allowing the device to operate autonomously unless explicitly controlled by the patient. Both online and embedded algorithms are implemented, with the objective of decoding neural data recorded from animal models through neural interfaces. Moreover, a prototype for peripheral neural recording is developed, embedding algorithm testing and stimulation delivery. This device’s design has the potential to record and process in real-time up to 16 channels at sampling rates up to 25 kHz for 8 channels. It is equipped with SDHC memory data storage, serial communication and Bluetooth connectivity for basic device control. The prototype is capable of working in different modalities, whose main categories include data recording and storage, and real-time data classification through a neural network algorithm on-chip. Graphical User Interface (GUI) applications are developed for MacOS for visualizing recorded data, audio playback, impedance checking of active neural interface sites and recording evoked CNAPs. The device has been tested under various conditions through on-bench testing, during which power consumption and recording stability have been monitored. The embedded AI algorithms have been tested in hardware-in-the-loop mode using real data acquired from animal models through the same neural interfaces intended for the application.
On-bench recording tests have shown promising results in terms of theoretical versus expected channel recording frequency, stability in serial data transmission and external memory storage over time. The firmware’s multithreading management ensures sampling rate compliance, achieving zero data loss in recordings. The GUI applications have also demonstrated stable behavior and effective management of simultaneous plotting, data storage and audio monitoring, showing minimal latency and successful real-time performance. The embedded algorithm has shown supportive results in terms of real-time classification performance metrics, latency, memory occupation and comparison with the results obtained from online algorithms running on desktop computers. Signals acquired using the prototype have proven to be highly sensitive to noise from certain electronic components on the Printed Circuit Board (PCB), environmental noise, and electromagnetic interference. Future developments will take into consideration implementing a more robust analog-digital circuit area separation, together with upgrading connections between the device and the neural interface used.
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