Tesi etd-11052020-153044
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Tipo di tesi
Corso Ordinario Secondo Livello
Autore
SEVERIN, DAVIDE
URN
etd-11052020-153044
Titolo
Verilog-A model development and AI autonomous optimization of a DC-DC switching boost controller
Struttura
Cl. Sc. Sperimentali - Ingegneria
Corso di studi
INGEGNERIA - INGEGNERIA
Relatori
Tutor Prof.ssa MENCIASSI, ARIANNA
Relatore Prof. BRUSCHI, PAOLO
Relatore Ing. CAPODIVACCA, GIOVANNI
Relatore Prof. BRUSCHI, PAOLO
Relatore Ing. CAPODIVACCA, GIOVANNI
Parole chiave
- model verilog-a AI GDE boost converter
Data inizio appello
14/12/2020;
Disponibilità
parziale
Riassunto analitico
Development of a model in Verilog-A modeling language of an entire transistor-level DC-DC switching boost controller, starting from every single sub-modules. The models are parametric so that they can be fit to many similar project. The optimization, for this schematic, has been done by means of a Artificial Intelligence algorithm named Generalized Differential Evolution. The models are therefore fit to the transistor-level response for different stimuli, but also at three different temperatures. Finally a comparison of the output responses is shown, but also the overall saving of CPU-time while performing a verification plan with the Verilog-A models intead of the transistor level blocks.
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