DTA

Digital Theses Archive

 

Tesi etd-11052020-153044

Type of thesis
Corsi integrativi di II livello
Author
SEVERIN, DAVIDE
URN
etd-11052020-153044
Title
Verilog-A model development and AI autonomous optimization of a DC-DC switching boost controller
Structure
Cl. Sc. Sperimentali - Ingegneria
Course
INGEGNERIA - INGEGNERIA
Committee
Tutor Prof.ssa MENCIASSI, ARIANNA
Relatore Prof. BRUSCHI, PAOLO
Presidente Prof. FRISOLI, ANTONIO
Relatore Ing. CAPODIVACCA, GIOVANNI
Membro Prof. STEFANINI, CESARE
Membro Dott. AVIZZANO, CARLO ALBERTO
Membro Prof. BUTTAZZO, GIORGIO CARLO
Membro Prof. CASTOLDI, PIERO
Membro Prof. CUCINOTTA, TOMMASO
Membro Prof. DI PASQUALE, FABRIZIO CESARE FILIPPO
Membro Prof. MICERA, SILVESTRO
Keywords
  • model verilog-a AI GDE boost converter
Exam session start date
14/12/2020;
Availability
parziale
Abstract
Development of a model in Verilog-A modeling language of an entire transistor-level DC-DC switching boost controller, starting from every single sub-modules. The models are parametric so that they can be fit to many similar project. The optimization, for this schematic, has been done by means of a Artificial Intelligence algorithm named Generalized Differential Evolution. The models are therefore fit to the transistor-level response for different stimuli, but also at three different temperatures. Finally a comparison of the output responses is shown, but also the overall saving of CPU-time while performing a verification plan with the Verilog-A models intead of the transistor level blocks.
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